LV8746V Application Note Datasheet by onsemi

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Semiconductor Components Industries, LLC, 2013
December, 2013
http://onsemi.com
LV8746V
Overview
LV8746V is 2-channel H-bridge driver IC that can switch a stepping motor driver, which is capable of
micro-step drive and supports Full-step, Half-step (full torque), Half-step, and Quarter-step resolution, which
can select the CLK-IN input and the parallel input. This is best suited for driving of the stepping motor for OA
and amusement.
Function
PWM current control stepping motor driver
BiCDMOS process IC
On resistance (upper side: 0.84, lower side: 0.7, total of upper and lower: 1.54; Ta=25˚C, IO=1A)
Micro step mode can be set to full-step, half-step (full torque), half-step, and quarter-step mode
CLK-IN input and parallel input selectable
Motor current selectable in four steps
Output short-circuit protection circuit incorporated
Unusual condition warning output pins
Built-in thermal shutdown circuit
No control power supply required
Typical Applications
MFP (Multi Function Printer)
PPC (Plain Paper Copier)
LBP (Laser Beam Printer)
Photo printer
Scanner
Industrial
Cash Machine
Amusement
Textile
Bi-CMOS LSI
PWM Current Control Stepping
Motor Driver
Application Note
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LV8746V Application Note
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Package Dimensions
unit : mm (typ)
Caution: The package dimension is a reference value, which is not a guaranteed value.
Recommended Soldering Footprint
(Unit:mm)
Reference symbol SSOP44K(275mil)
eE 7.00
e 0.65
b3 0.32
l1 1.00
X (4.7)
Y (3.5)
SANYO : SSOP44K(275mil)
15.0
7.6
(3.5)
(4.7)
5.6
0.5
0.22 0.2
0.65
(0.68)
0.1 (1.5)
1.7MAX
TOP VIEW SIDE VIEW
SIDE VIEW
BOTTOM VIEW
122
2344
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Pin Assignment
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
NCVG
OUT1AVM
PGND1CP2
NCCP1
NCVREG5
NCATT2
VM1ATT1
NCEMO
RF1CEM
NCNC
OUT1BRCHOP
OUT2ANC
NCRST/PH1
RF2STP/I01
NCFR/I11
VM2MD2/PH2
NCMD1/I02
NCDM
NCOE/I12
PGND2ST
OUT2BVREF
NCGND
Top view
LV8746V
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Block Diagram
Output control logic
Current selection
(full/half-full/
half/quarter)
Oscillation
circuit
TSD
LVS
VM2
OUT1A OUT1B OUT2A OUT2BRF1 RF2
ST FR/
I11
STP/
I01
MD1/
I02
PGND
OE/
I12
Charge pump
CP1
CP2 VG
VREF Attenuator
(4 levels
selectable)
GND
VM
MD2/
PH2
VM1
Regulator
RST/
PH1
RCHOP ATT1 ATT2
VREG5
EMO
CEM
DM
Output preamplifier stage
Output preamplifier stage
Output preamplifier stage
Output preamplifier stage
Current selection
(full/half-full/
half/quarter)
CPU
Mi-com
LV8746V Application Note
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Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter Symbol Conditions Ratings Unit
Supply voltage VM max 38 V
Output peak current IO peak tw 10ms, duty 20% 1.2 A
Output current IO max 1A
Logic input voltage VIN -0.3 to +6 V
EMO input voltage Vemo -0.3 to +6 V
Allowable power dissipation Pd max Ta 85C * 3.1 W
Operating temperature Topr -20 to +85 C
Storage temperature Tstg -55 to +150 C
Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time.
Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage
under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may
be degraded. Please contact us for the further details.
Recommended Operating Conditions at Ta 25C
Parameter Symbol Conditions
Ratings
Unit
min typ max
Supply voltage range VM 9 35 V
Logic input voltage VIN 0 5.5V
VREF input voltage range VREF 0 3 V
Electrical Characteristics at Ta = 25°C, VM = 24V, VREF = 1.5V
Parameter Symbol Conditions
Ratings
Unit
min typ max
Standby mode current drain IMst ST = “L” 190 300 A
Current drain IM ST = “H”, OE = “L”, with no load 3.3 5 mA
VREG5 output voltage Vreg5 IO = -1mA 4.5 5 5.5 V
Thermal shutdown temperature TSD Design guarantee 150 180 210 C
Thermal hysteresis width TSD Design guarantee 40 C
Motor driver
Output on resistance Ronu IO = 1A, Upper-side on resistance 0.84 1.1
Rond IO = 1A, Lower-side on resistance 0.7 0.9
Output leakage current IOleak 50 A
Diode forward voltage VD ID = -1A 1.0 1.3 V
Logic pin input current(ST) IINL VIN = 0.8V 3 8 15 A
IINH VIN = 5V 50 78 110 A
Logic pin input current(other ST) IINL VIN = 0.8V 3 8 15 A
IINH VIN = 5V 30 50 70 A
Logic high-level input voltage VINH 2.0 V
Logic low-level input voltage VINL 0.8 V
Current setting
comparator
threshold
voltage
(CLK-IN input)
Quarter-step
drive
Vtdac0_W Step 0 (When initialized : channel 1
comparator level)
0.29 0.3 0.31 V
Vtdac1_W Step 1 (Initial state+1) 0.29 0.3 0.31 V
Vtdac2_W Step 2 (Initial state+2) 0.185 0.2 0.215 V
Vtdac3_W Step 3 (Initial state+3) 0.09 0.1 0.11 V
Half-step drive Vtdac0_M Step 0 (When initialized : channel 1
comparator level)
0.29 0.3 0.31 V
Vtdac2_M Step 2 (Initial state+1) 0.185 0.2 0.215 V
Half-step (full
torque) drive
Vtdac0_H Step 0 (When initialized : channel 1
comparator level)
0.29 0.3 0.31 V
Vtdac2_H Step 2 (Initial state+1) 0.29 0.3 0.31 V
Full-step drive Vtdac2_F Step 2 0.29 0.3 0.31 V
Continued on next page.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
LV8746V Application Note
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Continued from preceding page.
Parameter Symbol Conditions
Ratings
Unit
min typ max
Current setting comparator
threshold voltage
(parallel input)
Vtdac11 I01 = H , I11 = H 0.29 0.3 0.31 V
Vtdac01 I01 = L , I11 = H 0.185 0.2 0.215 V
Vtdac10 I01 = H , I11 = L 0.09 0.1 0.11 V
Current setting comparator
threshold voltage
(current attenuation rate switching)
Vtatt00 ATT1 = L, ATT2 = L 0.29 0.3 0.31 V
Vtatt01 ATT1 = H, ATT2 = L 0.185 0.2 0.215 V
Vtatt10 ATT1 = L, ATT2 = H 0.135 0.15 0.165 V
Vtatt11 ATT1 = H, ATT2 = H 0.09 0.1 0.11 V
Chopping frequency Fchop Rchop = 20K 45 62.5 75 kHz
VREF pin input current Iref VREF = 1.5V -0.5 A
Charge pump
VG output voltage VG 28 28.75 30 V
Rise time tONG VG = 0.1F 0.5 mS
Oscillator frequency Fosc Rchop = 20K 90 125 150 kHz
Output short-circuit protection
EMO pin saturation voltage Vsatemo Iemo = 1mA 80 160 mV
CEM pin charge current Icem Vcem = 0V 7 10 13 A
CEM pin threshold voltage Vthcem 0.8 1.0 1.2 V
350 300 250 g 200 2 E: 150 25 g 100 — _ 50 u u 10 20 so 40 u 10 20 so 40 VM (V) VM (V) Figure 1. Stanby Mode Current Figure 2. Current Drain Drain vs. VM Voltage vs. VM Voltage 5 1 5 05 A ’ g > - E 5 1'3 8 > g 4 95 A a 0 10 20 30 A0 0 10 20 30 40 VM (V) VM (V) Figure 3. VREG5 Output Voltage Figure 4 ST pin Threshold Voltage vs. VM Voltage vs. VM Voltage 2 100 1 B 80 1 5 g 1 4 2 60 g 1 2 3 > 1 5 4° 0 B 20 o s u 0 1o 20 30 A0 0 2 4 6 . VM (‘5) . VST (V) FIgure 5. Logic HIgh/Low-level Figure 6. ST pin input Current input Voltage vs. VM Voltage vs. Logic input Voltage 60 20 50 15 AD g 30 g 10 .E u- ‘ 20 E 5 10 n n 0 2 A s 0 1 2 3 Vin (V) VREF (V) Figure 7. Logic pin input Current Figure 8. VREF pin input Current vs. Logic input Voltage vs. VREF Voltage
LV8746V Application Note
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400 45 350 40 300 :3 A 250 H 25 > > 5 200 G 20 o 150 > 15 E 100 10 E 50 5 u D 1 2 3 4 5 0 1o 20 30 40 _ lemo (mA) _ _ VM (V) FIgure 9. EMO saturation FIgure 10. VG Output Voltage voltage vs. EMO p Input current vs. VM Voltage Q Q : c o o n: n: VD (v1 0 2 0 4 0 6 0 8 1 1 2 |out(A) Figure 11. Output on Resistance vs. Output Current o 2 0 A o s o 8 1 1 2 lout (A) Figure 13. Diode forward voltage vs. Output Current Perm Rand ,50 U 50 100 150 TEMPERATURECC) Figure 12. Output on Resistance vs. Junction Temperature
LV8746V Application Note
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6m 2: 100m 2kg 5609 flaw 560s) :
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Pin Functions
Pin No. Pin Name Pin Function Equivalent Circuit
6
7
13
14
15
16
17
18
19
ATT2
ATT1
RST/PH1
STP/I01
FR/I11
MD2/PH2
MD1/I02
DM
OE/I12
Motor holding current switching pin.
Motor holding current switching pin.
CLK-IN is input , RESET input pin /
Parallel is input , Channel 1
forward/reverse rotation pin.
CLK-IN is input , STEP signal input pin /
Parallel is input , Channel 1 output
control input pin.
CLK-IN is input , forward/reverse signal
input pin / Parallel is input , Channel 1
output control input pin.
CLK-IN is input , Excitation mode
switching pin / Parallel is input , Channel
2 forward/reverse rotation pin.
CLK-IN is input , Excitation mode
switching pin / Parallel is input , Channel
2 output control input pin.
Drive mode switching pin.
CLK-IN is input , output enable signal
input pin / Parallel is input , Channel 2
output control input pin.
VREG5
GND
20 ST Chip enable pin.
VREG5
GND
24
25
42
29
31
33
34
36
38
43
OUT2B
PGND2
PGND1
VM2
RF2
OUT2A
OUT1B
RF1
VM1
OUT1A
Channel 2 OUTB output pin.
Power system ground pin2.
Power system ground pin1.
Channel 2 motor power supply
connection pin.
Channel 2 current-sense resistor
connection pin.
Channel 2 OUTA output pin.
Channel 1 OUTB output pin.
Channel 1 current-sense resistor
connection pin.
Channel 1 motor power supply pin.
Channel 1 OUTA output pin.
GND
34 24
29
38
33
43
36
31
4225
Continued on next page.
H h %}
LV8746V Application Note
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Continued from preceding page.
Pin No. Pin Name Pin Function Equivalent Circuit
1
2
3
4
VG
VM
CP2
CP1
Charge pump capacitor connection pin.
Motor power supply connection pin.
Charge pump capacitor connection pin.
Charge pump capacitor connection pin.
100Ω
GND
VREG5
432 1
21 VREF Constant current control reference
voltage input pin.
GND
VREG5
5 VREG5 Internal power supply capacitor
connection pin.
GND
VM
8
EMO
Output short-circuit state warning output
pin.
VREG5
GND
Continued on next page.
o
LV8746V Application Note
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Continued from preceding page.
Pin No. Pin Name Pin Function Equivalent Circuit
9 CEM Pin to connect the output short-circuit
state detection time setting capacitor.
GND
VREG5
11 RCHOP Chopping frequency setting resistor
connection pin.
GND
VREG5
22 GND Ground.
10,12
23,26
27,28
30,32
35,37
39,40
41,44
NC No Connection
(No internal connection to the IC)
LV8746V Application Note
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Description of operation
Input Pin Function
The function to prevent including the turn from the input to the power supply is built into each input pin.
Therefore, the current turns to the power supply even if power supply (VM) is turned off with the voltage
impressed to the input pin and there is not crowding.
(1) Chip enable function
This IC is switched between standby and operating mode by setting the ST pin. In standby mode, the IC is
set to power-save mode and all logic is reset. In addition, the internal regulator circuit and charge pump
circuit do not operate in standby mode.
ST Mode Internal regulator Charge pump
Low or Open Standby mode Standby Standby
High Operating mode Operating Operating
(2) Input control method switching pin function
The IC input control method is switched by setting the DM pin. The CLK-IN input control and the parallel
input control can be selected by setting the DM pin.
DM Input control method
Low or Open CLK-IN input control
High Parallel input control
(3) Setting constant-current control reference current
This IC is designed to automatically exercise PWM constant-current chopping control for the motor current
by setting the output current. Based on the voltage input to the VREF pin and the resistance connected
between RF and GND, the output current that is subject to the constant-current control is set using the
calculation formula below:
IOUT = (VREF/5)/RF resistance
* The above setting is the output current at 100% of each excitation mode.
If VREF is open or the setting is out of the recommendation operating range, VREF is set around 5V. As a
result, output current will increase and you cannot set constant current under normal condition. Hence,
make sure that VREF is set in accordance with the specification.
However, if current control is not performed (if the IC is used without saturation drive or current limit) make
sure that the setting is as follows: VREF=5V or VREF=VREG5
The voltage input to the VREF pin can be switched to four-step settings depending on the statuses of the
two inputs, ATT1 and ATT2. This is effective for reducing power consumption when motor holding current
is supplied.
Attenuation function for VREF input voltage
ATT1 ATT2 Current setting reference voltage attenuation ratio
Low Low 100%
High Low 66.7%
Low High 50%
High High 33.3%
olor Current 3 I n 100% (3:9 50% The formula used to calculate the output current when usin voltage is given below. IOUT = (VREF/5) x (attenuation ratio)/RF resis Example: At VREF of 1.41V, a reference voltage setting o resistance of 0.47;), the output current is set as s IOUT =1.41V/5 x100%/0.4m = 0.6A If, in this state, (ATTl, ATTZ) is set to (H, H), IOU IOUT = 0.6A x 33.3% = 0.2A In this way, the output current is attenuated when power can be conserved. (4) Setting the chopping frequency For constant-current control, chopping operation is made w resistor (connected to the RCHOP pin). The chopping frequency to be set with the resistance conn below. (5) Blanking period If, when exercising PWM constant-current chopping contro from decay to charge, the recovery current of the parasitic d causing noise to be carried on the current sensing resistan detection. To prevent this erroneous detection, a blanking p during mode switching from being received. During this pe decay even if noise is carried on the current sensing resist In this IC, the blanking time is fixed at 1/16 of one chopping
LV8746V Application Note
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The formula used to calculate the output current when using the function for attenuating the VREF input
voltage is given below.
IOUT = (VREF/5) × (attenuation ratio)/RF resistance
Example: At VREF of 1.41V, a reference voltage setting of 100% [(ATT1, ATT2) = (L, L)] and an RF
resistance of 0.47, the output current is set as shown below.
IOUT = 1.41V/5 × 100%/0.47 = 0.6A
If, in this state, (ATT1, ATT2) is set to (H, H), IOUT will be as follows:
IOUT = 0.6A × 33.3% = 0.2A
In this way, the output current is attenuated when the motor holding current is supplied so that
power can be conserved.
(4) Setting the chopping frequency
For constant-current control, chopping operation is made with the frequency determined by the external
resistor (connected to the RCHOP pin).
The chopping frequency to be set with the resistance connected to the RCHOP pin (pin 11) is as shown
below.
(5) Blanking period
If, when exercising PWM constant-current chopping control over the motor current, the mode is switched
from decay to charge, the recovery current of the parasitic diode may flow to the current sensing resistance,
causing noise to be carried on the current sensing resistance pin, and this may result in erroneous
detection. To prevent this erroneous detection, a blanking period is provided to prevent the noise occurring
during mode switching from being received. During this period, the mode is not switched from charge to
decay even if noise is carried on the current sensing resistance pin.
In this IC, the blanking time is fixed at 1/16 of one chopping cycle.
ATT1
5V
/
div
100% 50%
Motor Current
ATT2
5V
/
div
Iout1
0.2A
/
div
Iout2
0.2A
/
div
50ms/div
VM=24V
VREF=1V
RF=0.47
PCA01883
0
20
40
60
80
100
03020 4010 50 60
RCHOP – kΩ
Fchop – kHz
Chopping frequency settings (reference data)
STP Set current Set current Collnurrenl Famed CHARGE gentian fchop J ' Cunent mode CHARGE SLOW FAST CHARGE SLOW F‘AST (Sin STP Set curmntfi—fi Coilcurrent Famed CHARGE ‘ section ‘ Sel current fchop _ ~> e 1 ~> e 1 E e) H) Currentmode CHARGE SLOW FAST Forcled CHARGE FAST CHARGE SLOW Sedan In each cAt fore cho cTh Above tncreas followe
LV8746V Application Note
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(6) Current control operation specification
(Sine wave increasing direction)
(Sine wave decreasing direction)
In each current mode, the operation sequence is as described below:
At rise of chopping frequency, the CHARGE mode begins. (The section in which the CHARGE mode is
forced regardless of the magnitude of the coil current (ICOIL) and set current (IREF) exists for 1/16 of one
chopping cycle.)
The coil current (ICOIL) and set current (IREF) are compared in this forced CHARGE section.
When (ICOIL<IREF) state exists in the forced CHARGE section;
CHARGE mode up to ICOIL IREF, then followed by changeover to the SLOW DECAY mode, and
finally by the FAST DECAY mode for the 1/16 portion of one chopping cycle.
When (ICOIL<IREF) state does not exist in the forced CHARGE section;
The FAST DECAY mode begins. The coil current is attenuated in the FAST DECAY mode till one
cycle of chopping is over.
Above operations are repeated. Normally, the SLOW (+FAST) DECAY mode continues in the sine wave
increasing direction, then entering the FAST DECAY mode till the current is attenuated to the set level and
followed by the SLOW DECAY mode.
1. CHARGE w Current namway n or; U2 err L1 3L2 fl ming chopping to ou‘pu
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(7) Output Transistor Operation Mode
OUTA OUTB
RF
VM
OFF
OFF
OFF
ON
OUTA OUTB
RF
VM
OFF
OFF
ON
ON
OUTA OUTB
RF
VM
OFF
OFF
OFF
OFF
4. 5. FAST 6.
U1
L1
U2
L2
U1
L1
U1
L1
U2
L2
U2
L2
This IC controls constant current by performing chopping to output transistor.
As shown above, by repeating the process from 1 to 6, setting current is maintained.
Chopping consists of 3 modes: Charge/ Slow decay/ Fast decay. In this IC, for switching mode (No.2, 4, 6),
there are between the transistors. This off period is set to be constant ( 0.5µs) which is controlled by the
internal logic. The diagrams show parasitic diode generated due to structure of MOS transistor. When the
transistor is off, output current is regenerated through this parasitic diode.
Output Transistor Operation Function
OUTAOUTB (CHARGE)
Output Tr CHARGE SLOW FAST
U1 ON OFF OFF
U2 OFF OFF ON
L1 OFF ON ON
L2 ON ON OFF
OUTBOUTA (CHARGE)
Output Tr CHARGE SLOW FAST
U1 OFF OFF ON
U2 ON OFF OFF
L1 ON ON OFF
L2 OFF ON ON
Charge increases
current.
Switch from Charge to
Slow Decay
Current regeneration
by Slow Decay
Switch from Slow Decay
to Fast Decay
Current regeneration
by Fast Decay
Switch from Fast Decay
to Charge
K “- - mi. Sine wave increasing direction Current mode When the moior current reaches to the selling curreni. ii is swi Motor current switches from Siow Decay mode to Fasi Decay m
LV8746V Application Note
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Sine wave increasing direction Sine wave decreasing direction
Current mode
When the motor current reaches to the setting current, it is switched to Slow Decay mode.
Motor current switches from Slow Decay mode to Fast Decay mode for 1/16 of one chopping cycle.
Motor Current
0.2A/div
Set Current
Set Current
SLOW CHARGE
FAST
STEP
5V
/
div
10ms/div
20µs/div 20µs/div
Motor Current
0.2A/div
STEP
5V
/
div
STEP
5V
/
div
OUTA
20V/div
5µs/div
Motor Current
200mA/div
VM=24V
VREF=1V
RF=0.47
RCHOP=20k
OUTB
20V/div
OUTA
20V/div
OUTB
20V/div
Motor Current
0.5A/div
OUTA
20V/div
OUTB
20V/div
f l Tslevh men <—><—> 57" |||||||||||\\\ (mflfi‘ep) (5.9mm) 99> MD1 X X (magfiéwp) (5.9mm HH MD2 X X FR RST RESET STF‘ ‘ 1choulpu1 2chuu¢pu1 4—» In Itlal state When the RST pin ‘5 setto High, 1 RST is then set to Low, me excita
LV8746V Application Note
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CLK-IN input control (DM = Low or Open)
(1) STP pin function
The excitation step progresses by inputting the step signal to the STP pin.
Input Operating mode
ST STP
Low * Standby mode
High
Excitation step proceeds
High
Excitation step is kept
STP input MIN pulse width (common in H/L): 500ns (MAX input frequency: 1MHz)
However, constant current control is performed by PWM during chopping period, which is set by the
resistor connected between RCHOP and GND. You need to perform chopping more than once per step.
For this reason, for the actual STP frequency, you need to take chopping frequency and chopping count
into consideration.
For example, if chopping frequency is 62.5kHz (16µs) and chopping is performed twice per step, the
maximum STP frequency is obtained as follows: f=1/(16µs×2) = 31kHz.
(2) Input timing
TstepH/TstepL : Clock H/L pulse width (min 500ns)
Tds : Data set-up time (min 500ns)
Tdh : Data hold time (min 500ns)
(3) Reset function
RST Operating mode
Low Normal operation
High Reset state
When the RST pin is set to High, the excitation position of the output is forcibly set to the initial state. When
RST is then set to Low, the excitation position is advanced by the next STP input.
8746V Application Note Operating mode Output OFF Output ON OE Powei save mode STP 1th output 2m output Output is high—impedance the OE pin is set High, the out e internal logic circuits a Signal is input to the STP pin. Theref excitation position proceeded by the erse switching function Opera Ciuckw Cuunterrclu FR <7 cw="" made="" cow="" mode="" cw="" mode="" stp="" excitation="" position="" ich="" output="" zch="" output="">
LV8746V Application Note
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(4) Output enable function
OE Operating mode
High Output OFF
Low Output ON
When the OE pin is set High, the output is forced OFF and goes to high impedance.
However, the internal logic circuits are operating, so the excitation position proceeds when the STEP
signal is input to the STP pin. Therefore, when OE is returned to Low, the output level conforms to the
excitation position proceeded by the STEP input.
(5) Forward/reverse switching function
FR Operating mode
Low Clockwise (CW)
High Counter-clockwise (CCW)
The internal D/A converter proceeds by one bit at the rising edge of the input STEP pulse.
In addition, CW and CCW mode are switched by setting the FR pin.
In CW mode, the channel 2 current phase is delayed by 90° relative to the channel 1 current.
In CCW mode, the channel 2 current phase is advanced by 90° relative to the channel 1 current.
Channe‘ I phase current ram (%) 100 !< 80="" 60="" 40="" 20="" 20="" 40="" so="" channe‘="" 2="" phase="" current="" rano="" ("/n)="" so="" ion="">
LV8746V Application Note
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(6) Output current vector locus (one step is normalized to 90 degrees)
0
20
40
60
80
100
0 20406080100
Channel 1 phase current ratio (%)
Channel 2 phase current ratio (%)
θ0θ1
θ2
θ3
θ4
θ2'(Full-step /
Half-step full
torque)
Setting current ration in each excitation mode
STEP Quarter Step (%) Half Step (%) Half Step (full torque) (%) Full Step (%)
Channel 1 Channel 2 Channel 1 Channel 2 Channel 1 Channel 2 Channel 1 Channel 2
0 100 0 100 0 100 0
1 100 33.3
2 66.7 66.7 66.7 66.7 100 100 100 100
3 33.3 100
4 0 100 0 100 0 100
LV8746V Application Note
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(7) Excitation mode setting function
The excitation mode of the stepping motor can be set as follows by setting the MD1 pin and the MD2 pin.
MD1 MD2 Microstep Resolution Excitation mode Initial position
Channel 1 Channel 2
Low Low Full Step 2 phase 100% -100%
High Low Half Step (full torque) 1-2 phase (full torque) 100% 0%
Low High Half Step 1-2 phase 100% 0%
High High Quarter Step W1-2 phase 100% 0%
This is the initial position of each excitation mode in the initial state after power-on and when the counter is reset.
(8) Excitation mode switching operation
When excitation mode is switched while the motor is rotating, each drive mode operates with the following
sequence.
Clockwise mode
Before the Microstep Resolution changes Position after the Microstep Resolution is changed
Microstep
Resolution
Position Quarter Step Half Step Half Step
(full torque)
Full Step
Quarter Step
0 2 2' 2'
1 2 2' 2'
2 4 4 2'
3 2 2' 2'
4 -2 -2' -2'
Half Step
0 1 2' 2'
2 3 2' 2'
4 -3 -2' -2'
Half Step
(full torque)
0 1 2' 2'
2' 3 4 2'
4 -3 -2 -2'
Full Step 2' 3 4 4
*As for 0 to 4, please refer to the step position of current ratio setting.
If you switch microstep mode while the motor is driving, the mode setting will be reflected from the next
STEP and the motor advances to the closest excitation position at switching operation.
_|_—|__|__|_—|_—|__|___—|__|__|_
LV8746V Application Note
21/37
(9) Typical current waveform in each excitation mode
Full Step (CW mode)
Half Step (full torque (CW mode))
STP
I1
I2
100
0
－100
100
0
－100
(%)
(%)
STP
I1
I2
100
－100
0
100
0
－100
（％）
（％）
TfLTILTfLTILTSLT_ 111111111111111111
LV8746V Application Note
22/37
Half steprg (CW mode)
STP
I1
I2
100
0
－100
100
0
－100
(%)
(%)
Quarter Step (CW mode)
STP
I1
I2
100
0
－100
100
0
－100
(%)
(%)
LV8746V Application Note
23/37
Parallel input Mode (DM-High)
(1) Parallel input control logic
I01(02) I11(12) Output current (IO)
Low Low 0
High Low IO = ((VREF/5)/RF)×1/3
Low High IO = ((VREF/5)/RF)×2/3
High High IO = (VREF/5)/RF
PH1(2) current direction
Low OUTB OUTA
High OUTA OUTB
100
LV8746V Application Note
24/37
(2) Typical current waveform in each excitation mode when stepping motor parallel input control
Full Step (CW mode)
I1
I2
100
－100
0
100
0
－100
（％）
（％）
I01,I11
I02,I12
PH1
PH2
H
H
Half Step (full torque (CW mode))
I12
I1
I2
100
0
－100
100
0
－100
(%)
(%)
PH2
PH1
I02
I01
I11
100
LV8746V Application Note
25/37
Half Step (CW mode)
I12
I1
I2
100
0
－100
100
0
－100
(%)
(%)
PH2
PH1
I02
I01
I11
Quarter Step (CW mode)
I1
I2
100
0
－100
100
0
－100
(%)
(%)
I12
PH2
PH1
I02
I01
I11
IXM IXM If is“ ”if M is" OFF <{e rf="" aeif-=""><{e hf="" 43’»-="" t="" t="" ce="" a%="" :e%="" 3*="" %e="" arm="" +|:«="" arm="" 4%="" iv="" _="" t="" t="" fl}="" hf="" &="" hf="" e="" w,="" q="" i="" *5="" a*m="" *5="" fl:="">
LV8746V Application Note
26/37
Output short-circuit protection function
This output short protection circuit that makes the output a standby mode to prevent the thing that IC
destroys when the output is short-circuited by a voltage short and the earth fault, etc. , and turns on the
warning output to IC is built into.
VM short 1.High current flows if Tr1 and Tr4 are
ON.
2.If RF voltage> setting voltage, then the
mode switches to SLOW decay.
3.If the voltage between D and S of Tr4
exceeds the reference voltage for 4s,
short status is detected.
VM short
M
Tr1
ON
Tr2
OFF
Tr3
OFF
Tr4
ON
VM
OUTA OUTB
RF
Short-circuit
Detection
M
Tr1
ON
Tr2
OFF
Tr3
OFF
Tr4
ON
VM
OUTA OUTB
RF
Short-circuit
Detection
(left schematic)
1.High current flows if Tr1 and Tr4 are ON
2. If the voltage between D and S of Tr1
exceeds the reference voltage for 2s,
short status is detected.
(right schematic)
1.Without going through RF resistor,
current control does not operate and
current will continue to increase in
CHARGE mode.
2. If the voltage between D and S of Tr1
exceeds the reference voltage for 4s,
short status is detected.
Load short
M
Tr1
ON
Tr2
OFF
Tr3
OFF
Tr4
ON
VM
OUTA OUTB
RF
M
Tr1
ON
Tr2
OFF
Tr3
OFF
Tr4
ON
VM
OUTA OUTB
RF
Short-circuit
Detection
1.Without L load, high current flows.
2. If RF voltage> setting voltage, then the
mode switches to SLOW decay.
3.During load short status in SLOW
decay mode, current does not flow and
overcurrent state is not detected. Then
the mode is switched to FAST decay
according to chopping cycle.
4. Since FAST state is short (1s),
switches to CHARGE mode before short
is detected.
5.If voltage between D and S exceeds the
reference voltage continuously during
blanking time at the start of CHARGE
mode (Tr1), CHARGE state is fixed
(even if RF voltage exceeds the setting
voltage, the mode is not switched to
SLOW decay). After 4us or so, short is
detected.
750 u so 100 150 _ TEMPERATURE (’C) Figure 15 Over Currem vs. Tempera‘ure
LV8746V Application Note
27/37
(6) Detect current
(1) Protection function operation (Latch type)
In the latch mode, the output is turned off when the output current exceeds the detection current, and the
state is maintained.
The output short protection circuit starts operating so that IC may detect a short output. When short-circuit
is the consecutive between internal timers (4s), the output where short-circuit is first detected is turned
off. Even if the following time (Tcem) of the timer latch is exceeded, the output is turned ON again, and
afterwards, when short-circuit is detected, all the outputs of correspondence ch side are still switched to
the standby mode, and the state is maintained. This state is released by making it to ST ="L".
Short-circuit
Detection state
H-bridge
output status
CEM Voltage
Threshold voltage
4µs
Output ON Output OFF
Output ON
Standby state
Short-
circuit Short-circuit
Release
Internal counter
1st counter
start
1st counter
stop
1st counter
start
1st counter
end
2nd counter
start
2nd counter
end
LV8746V Application Note
28/37
(2) Abnormal state warning output pin
When IC operates the protection circuit detecting abnormality, the EMO pin has been installed as a
terminal that outputs this abnormality to CPU side. This pin is an open drain output, and if abnormality is
detected, the EMO output becomes (EMO="L") of ON.
EMO pin enters on a state in the following.
When a voltage short, the earth fault or the load is short-circuited and the output short-circuit protection
circuit operates, the output pin
When the junction temperature of IC rises, and the overheating protection circuit operates
(3) Timer latch time (Tcem)
The time to output OFF when an output short-circuit occurs can be set by the capacitor connected between
the CEM pin and GND. The capacitor (Ccem) value can be determined as follows :
Timer latch: Tcem Tcem C × V/I [sec]
V : Threshold voltage of comparator TYP 1V
I : CEM charge current TYP 10µA
Latch type
Thermal shutdown function
The thermal shutdown circuit is incorporated and the output is turned off when junction temperature Tj
exceeds 180C and the abnormal state warning output is turned on. As the temperature falls by hysteresis,
the output turned on again (automatic restoration).
The thermal shutdown circuit does not guarantee the protection of the final product because it operates
when the temperature exceed the junction temperature of Tjmax=150C.
TSD = 180C (typ)
TSD = 40C (typ)
Unusual condition EMO Channel 1 Output Channel 2 Output
Channel 1 short-circuit detected ON OFF -
Channel 2 short-circuit detected ON - OFF
Overheating condition detected ON OFF OFF
OUT
10V
/
div
CEM
0.5V
/
div
EMO
5V
/
div
OUT-GND short
1V
CEM charge
5µs/div
1s
t
counter
4µs 2n
counter
VM=24V cpw-CP2=0,1pF VG=O.1pF
LV8746V Application Note
29/37
Charge Pump Circuit
When the ST pin is set High, the charge pump circuit operates and the VG pin voltage is boosted from the
VM voltage to the VM + VREG5 voltage. I will recommend the drive of the motor to put the time of tONG or
more after the ST pin is made "H", and to begin because I cannot control the output if there is no pressure
voltage of the voltage of the VG pin enough.
VG Pin Voltage Schematic View
tONG Startup time with different VG capacitor
tONG
ST
VM+VREG5
VM+4V
VM
VG pin voltage
VM+4V
tONG
VM=24V
CP1-CP2=0.1µF
VG=0.1µF
ST
5V
/
div
VG
5V
/
div
Vout
10V
/
div
50µs/div 500µs/div
VM=24V
CP1-CP2=0.1µF
VG=0.1µF/0.22µF/1µF
0.1µF/220µs
0.22µF/500µs
1µF/2.4ms
-\|——q—II v No E o uF ( IIfl—E VM OUTIA E— 3 CD PGNDI 3—42 —| TDuF 01“; I: \- 4 cm NC E '“—”——E VREL36 NC E our my; 0—E W No E mum o—E A171 VMI @— —w»—|§ EMO NC E 47m ‘II—H—E CEM RFI E—wfl—II- wopF IE NC NC El Ifl—W—E RCHOP OUTIE B3}— ZDKO LV8746V E NC OU12A E7 un—E RSTIPH1 NC E Log” / o—E STF/loi m E—W" W: m ‘_ o—E FRIm NC E fl—E MDZIPHZ VNQ @— q—Ifi MD1/Io2 NC 5| l|—|E DM NC 2| M—E OEIIIZ NC E Leave o—lzo ST PGNDQ E—I- 15v mm I ‘||—||—E VREF ouna In—E GND NC E
LV8746V Application Note
30/37
Application Circuit Example
Clock input control mode application circuit (DM=Low)
The setting conditions for the above circuit diagram example are as follows :
Full-step drive (MD1/I02 = Low, MD2/PH2 = Low)
Reset function fixed to normal operation (RST = Low)
Chopping frequency : 62.5kHz (RCHOP = 20k)
ATT1 ATT2 Current setting reference voltage
Low Low VREF/5×100%
High Low VREF/5×67%
Low High VREF/5×50%
High High VREF/5×33%
The set current value is as follows :
IOUT = (VREF/5 Voltage setting ratio) / RF
Example: When ATT=Low, ATT2=Low (VREF = 1.5V, RF=0.47)
I
OUT = (1.5V / 5 1 ) / 0.47 = 0.64A
—w»—||.
LV8746V Application Note
31/37
Parallel input control mode application circuit (DM = High)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
VG
VM
CP2
CP1
VREG5
ATT2
ATT1
EMO
CEM
NC
RCHOP
NC
RST/PH1
STP/I01
FR/I11
MD2/PH2
MD1/I02
DM
ST
VREF
GND
NC
OUT1A
PGND1
NC
NC
NC
VM1
NC
RF1
NC
OUT1B
OUT2A
NC
RF2
NC
VM2
NC
NC
NC
PGND2
OUT2B
NC
LV8746V
OE/I12
0.1µF
0.1µ F
47k
100pF
0.1µF
10µF
1.5V
M
0.47
0.47
20k
Logic
input
1ch
control
Logic
input
2ch
control
Logic
input
Logic
input
The setting conditions for the above circuit diagram example are as follows :
Chopping frequency : 62.5kHz (RCHOP = 20k)
I01(02) I11(12) Output current (IO)
Low Low 0
High Low IO = ((VREF/5) / RF) × 1/3
Low High IO = ((VREF/5) / RF) × 2/3
High High IO = (VREF/5) / RF
Example: When ATT=Low, ATT2=Low, I01(02)=High, I11(12)=High (VREF = 1.5V, RF=0.47)
IOUT = (1.5V / 5 1 ) / 0.47 = 0.64A
PH1(2) Electrical current direction
Low OUTB OUTA
High OUTA OUTB
Pd max — Ta 40 luLml n \\ uh umnlmnvmx mnumul nu uk- upmm an *1 mm m. cumlmuculx mmuucd an m: armed aw“! [mum ['\\u-L|)'cr cn'cun lmzml 1 *I am an ['\\u-lx|\'cr umm [maul Z *2 2 20 ’ 7 u to Mlowdblc 1mm dmmalion. 720 0 20 40 60 80 100 Amblcnl lcmpcramrc. Ta , DC
LV8746V Application Note
32/37
Allowable power dissipation
Substrate Specifications (Substrate recommended for operation of LV8746V)
Size : 90mm × 90mm × 1.6mm
Material : Glass epoxy
Copper wiring density : L1 = 85% / L2 = 90%
L1 : Copper wiring pattern diagram L2 : Copper wiring pattern diagram
Cautions
1) The data for the case with the Exposed Die-Pad substrate mounted shows the values when 90% or more
of the Exposed Die-Pad is wet.
2) For the set design, employ the derating design with sufficient margin.
Stresses to be derated include the voltage, current, junction temperature, power loss, and mechanical
stresses such as vibration, impact, and tension.
Accordingly, the design must ensure these stresses to be as low or small as possible.
The guideline for ordinary derating is shown below:
(1)Maximum value 80% or less for the voltage rating
(2)Maximum value 80% or less for the current rating
(3)Maximum value 80% or less for the temperature rating
3) After the set design, be sure to verify the design with the actual product.
Confirm the solder joint state and verify also the reliability of solder joint for the Exposed Die-Pad, etc.
Any void or deterioration, if observed in the solder joint of these parts, causes deteriorated thermal
conduction, possibly resulting in thermal destruction of IC.
‘VDU' Power sum #91 smn ‘wr new Supply Capacllm Capacllm 5VREG Capacllm m VREF VM Bypass «out SUN Elecuomc Fullup Reswslm |L7 se| cnannel 1 cnannel 2 550mm sw1swm «a Swnch MNAMA MSGZICVADI Yes Yes TP1VTP23 23 fest Pmm MACE 51473 Yes Yes
LV8746V Application Note
33/37
Evaluation board
LV8746V (90.0mm90.0mm1.6mm, glass epoxy 2-layer board, with backside mounting)
Bill of Materials for LV8746V Evaluation Board
Designator Quantity Description Value Tolerance Footprint Manufacturer Manufacturer Part Number
Substitution
Allowed Lead Free
C1 1
Capacitor
for Charge
pump
0.1µF,
100V ±10% Murata GRM188R72A104KA35* Yes Yes
C2 1
Capacitor
for Charge
pump
0.1µF,
100V ±10% Murata GRM188R72A104KA35* Yes Yes
C3 1
5VREG
stabilization
Capacitor
0.1µF,
100V ±10% Murata GRM188R72A104KA35* Yes Yes
C4 1
Capacitor to
set
CEM timer
100pF,
50V ±5% Murata GRM1882C1H101JA01* Yes Yes
C5 1
VREF
stabilization
Capacitor
0.1µF,
100V ±10% Murata GRM188R72A104KA35* Yes Yes
C6 1
VM Bypass
Capasitor
10µF,
50V ±20%
SUN Electronic
Industries 50ME10HC Yes Yes
R1 1
Pull-up
Resistor for
for terminal
EMO
47k,
1/10W ±5% KOA RK73B1JT**473J Yes Yes
R2 1
Resistor to set
chopping
frequency
20k,
1/10W ±5% KOA RK73B1JT**203J Yes Yes
R3 1
Channel 1
output current
detective
Resistor
0.47,
1W ±5% ROHM MCR100JZHJLR47 Yes Yes
R4 1
Channel 2
output current
detective
Resistor
0.47,
1W ±5% ROHM MCR100JZHJLR47 Yes Yes
IC1 1 Motor Driver
SSOP44K
(275mil)
SANYO
semiconductors LV8746V No Yes
SW1-SW10 10 Switch MIYAMA MS-621C-A01 Yes Yes
TP1-TP23 23 Test Point MAC8 ST-1-3 Yes Yes
ON
Semiconducto
r
I‘I—II—{ [3 j —E 3—— |:H—E j__.. :l -\|—(>—E :l I f:"1—E j I Hj—j—E j——
LV8746V Application Note
34/37
Evaluation board circuit
SW1
SW2
SW3
SW4
SW5
SW6
SW7
SW8
SW9
Motor
connection
terminal
SW10
*VDD
Power supply
input terminal
for Switch
0.1µF
0.1µF
0.1µF
47k
20k
100pF
10µF
0.47
0.47
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
VG
VM
CP2
CP1
VREG5
ATT2
ATT1
EMO
CEM
NC
RCHOP
NC
RST/PH1
STP/I01
FR/I11
MD2/PH2
MD1/I02
DM
OE/I12
ST
VREF
GND
NC
OUT1A
PGND
NC
NC
NC
VM1
NC
RF1
NC
OUT1B
OUT2A
NC
RF2
NC
VM2
MC
NC
NC
PGND
OUT2B
NC
LV8746V
C1
C2
C3
R1
C4
R2
C6
R3
R4
0.1µF
C5
*VM
Power supply
input terminal
*VREF
Constant Current Control for
Reference Voltage
STEP
5V
/
div
Iout1
0.2A
/
div
Iout2
0.2A/div
(3)
(4)
[Clock input control]
VM=24V,VDD=3.3V,VREF=1.5V
ST=H,DM=L
EMM=L,RST/PH1=L,OE/I12=L
ATT1=ATT2=L,
FR/I11=L
MD1/I02=MD2/PH2=H
STP/I01=500Hz(Duty50%)
(3)
(4)
(1)
(1)
5ms/div
[Parallel input control(OUT1A-OUT1B)]
VM=24V,VDD=3.3V,VREF=1.5V
ST=H,DM=H
EMM=L,ATT1=ATT2=L,
I01
5V
/
div
I11
5V
/
div
PH1
5V
/
div
Iout1
1A/div
5ms/div
<1>
<2>
<3>
<4>
<1>
<2>
<3>
<4>
Initial Condition Setting: Motor Connection: Power Suggly' Ready for 09erat|on from Standby State: Motor Ogeration: Other Setting Initial Condition Setting: Motor Connect n: Motor Operation. Other Setting
LV8746V Application Note
35/37
Evaluation Board Manual
[Supply Voltage] VM (9 to 35V): Power Supply for LSI
VREF (0 to 3V): Const. Current Control for Reference Voltage
VDD (2 to 5V): Logic “High” voltage for toggle switch
[Toggle Switch State] Upper Side: High (VDD)
Middle: Open, enable to external logic input
Lower Side: Low (GND)
[Operation Guide]
For clock input control
1. Initial Condition Setting: Set “Open” the toggle switch STP/I01, and “Open or Low” the other
switches
2. Motor Connection: Connect the Motors between OUT1A and OUT1B, between OUT2A and
OUT2B.
3. Power Supply: Supply DC voltage to VM, VREF and VDD.
4. Ready for Operation from Standby State: Turn “High” the ST terminal toggle switch. Channel 1
and 2 are into full-step initial position (100%, -100%).
5. Motor Operation: Input the clock signal into the terminal STP/I01.
6. Other Setting
i. ATT1, ATT2: Motor current attenuation.
ii. EMM: Short circuit protection mode change.
iii. RST/PH1: Initial Mode.
iv. FR/I11: Motor rotation direction (CW / CCW) setting.
v. MD1/I02, MD2/PH2: Excitation mode.
vi. OE/I12: Output Enable.
For parallel input control
1. Initial Condition Setting: Set “Open” the toggle switch DM, and “Open or Low” the other
switches
2. Motor Connection: Connect the Motors between OUT1A and OUT1B, between OUT2A and
OUT2B.
3. Power Supply: Supply DC voltage to VM, VREF and VDD.
4. Ready for Operation from Standby State: Turn “High” the ST and DM terminal toggle switch.
5. Motor Operation: Set STP/I01, MD1/I02, RST/PH1, MD1/I02, OE/I12 and MD2/PH2 terminals
according to the purpose
6. Other Setting
i. ATT1, ATT2: Motor current attenuation.
[Setting for External Component Value]
1. Constant Current (100%)
At VREF=1.5V
Iout =VREF [V] / 5 / RF []
=1.5 [V] / 5 / 0.47 []
=0.64 [A]
2. Chopping frequency setting.
62.5kHz (RCHOP=20k)
3. Short Protection Latch Time
Tscp =CEM [pF] x Vt[V] / Ichg [µA]
=100 [pF] x 1 [V] / 10 [µA]
=10 [µS]
vPower sugply connection terminal VM VM1,VM2 IGNDrerminaIIGND PGND1 PGND2 Exposed Die-Pad] clnternal gower suggly regulator rerminal yREGS clngut rerminal IOUT terminal OUT1A OUT’IB OUTZA OUTZB ICurrem sense resxstor connectionterminal RF1 RF2 INC terminal
LV8746V Application Note
36/37
Warning:
Power supply connection terminal [VM, VM1, VM2]
Make sure to short-circuit VM, VM1 and VM2.For controller supply voltage, the internal regulator voltage
of VREG5 (typ 5V) is used.
Make sure that supply voltage does not exceed the absolute MAX ratings under no circumstance.
Noncompliance can be the cause of IC destruction and degradation.
Caution is required for supply voltage because this IC performs switching.
The bypass capacitor of the power supply should be close to the IC as much as possible to stabilize
voltage. Also if you intend to use high current or back EMF is high, please augment enough capacitance.
GND terminal [GND, PGND1, PGND2, Exposed Die-Pad]
Since GND is the reference of the IC internal operation, make sure to connect to stable and the lowest
possible potential. Since high current flows into PGND, connect it to one-point GND.
The exposed die-pad is connected to the board frame of the IC. Therefore, do not connect it other than
GND. Independent layout is preferable. If such layout is not feasible, please connect it to signal GND. Or
if the area of GND and PGND is larger, you may connect the exposed die pad to the GND.
(The independent connection of exposed die pad to PGND is not recommended.)
Internal power supply regulator terminal [VREG5]
VREG5 is the power supply for logic (typ 5V).
When VM supply is powered and ST is ”H”, VREG5 operates.
Please connect capacitor for stabilize VREG5. The recommendation value is 0.1uF.
Since the voltage of VREG5 fluctuates, do not use it as reference voltage that requires accuracy.
Input terminal
The logic input pin incorporates pull-down resistor (100k).
When you set input pin to low voltage, please short it to GND because the input pin is vulnerable to noise.
The input is TTL level (H: 2V or higher, L: 0.8V or lower).
VREF pin is high impedance.
OUT terminal [OUT1A, OUT1B, OUT2A, OUT2B]
During chopping operation, the output voltage becomes equivalent to VM voltage, which can be the cause
of noise. Caution is required for the pattern layout of output pin.
The layout should be low impedance because driving current of motor flows into the output pin.
Output voltage may boost due to back EMF. Make sure that the voltage does not exceed the absolute
MAX ratings under no circumstance. Noncompliance can be the cause of IC destruction and degradation.
Current sense resistor connection terminal [RF1, RF2]
To perform constant current control, please connect resistor to RF pin.
To perform saturation drive (without constant current control), please connect RF pin to GND.
If RF pin is open, then short protector circuit operates. Therefore, please connect it to resistor or GND.
The motor current flows into RF – GND line. Therefore, please connect it to common GND line and low
impedance line.
NC terminal
NC pin is not connected to the IC.
If VM line and output line are wide enough in your layout, please use NC
LV8746V Application Note
37/37
ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number
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application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual
performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
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components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
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