LT1466L/67L Datasheet by Analog Devices Inc.

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1
LT1466L/LT1467L
Micropower Dual/Quad
Precision Rail-to-Rail Input
and Output Op Amps
■
Rail-to-Rail Input and Output
■
Low Supply Current: 75
µ
A Max
■
390
µ
V V
OS(MAX)
for V
CM
= V
–
to V
+
■
High Common Mode Rejection Ratio: 83dB Min
■
High A
VOL
: 400V/mV Min
■
Wide Supply Range: 2V to ±5V
■
Low Input Bias Current: 6nA Typ
■
120kHz Gain Bandwidth Product
FEATURES
DESCRIPTION
U
The LT
®
1466L/LT1467L are dual/quad bipolar op amps
that combine rail-to-rail input and output operation with
precision specifications. Using a patented technique,
both input stages of the LT1466L/LT1467L are trimmed:
one at the negative supply and the other at the positive
supply. The resulting common mode rejection of 83dB
minimum is much better than other rail-to-rail input op
amps. A minimum open-loop gain of 400V/mV into a 10k
load virtually eliminates all gain error. Operation is speci-
fied for 3V, 5V and ±5V supplies.
Unlike other rail-to-rail amplifiers, the input offset voltage
of 390µV maximum is guaranteed across the entire rail-to-
rail input range, not just at half supply. The graph below
contrasts the V
OS
specifications of the LT1466L/LT1467L
to a competitive part that is specified only at half supply.
As can be seen, the LT1466L/LT1467L’s limits are much
tighter for inputs near either supply.
The LT1466L is available in 8-lead PDIP and SO-8 pack-
ages with the standard dual pinout. The LT1467L features
the standard quad pinout and is available in a 16-lead
narrow SO package.
APPLICATIONS
U
■
Supply Current Sensing
■
Driving A/D Converters
■
Test Equipment Amplifiers
Worst-Case VOS
vs Input Common Mode Voltage
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATION
U
–
+
–
+
1/2 LT1466L 1/2 LT1466L
VN2222 10k
R1
100k
R2
10k
R3
5.1Ω
VCC
TP0610
VIN
0V TO 2.5V
IO
IO = VIN R2
R1
()
1
R3
()
=
V
IN
51Ω
()
1466L/67L TA01
Variable Current Source
INPUT COMMON MODE VOLTAGE (V)
0
INPUT OFFSET VOLTAGE (µV)
1466L/67L TA02
0
1000
2000
–1000
–2000
24
135
LT1467L LIMITS
TYPICAL RAIL-TO-RAIL
AMPLIFIER (65dB CMRR)
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2
LT1466L/LT1467L
ABSOLUTE MAXIMUM RATINGS
W
WW
U
Supply Voltage ........................................................ ±8V
Input Current ...................................................... ±15mA
Output Short-Circuit Duration (Note 1) .........Continuous
Specified Temperature Range......................0°C to 70°C
Junction Temperature........................................... 150°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
PACKAGE/ORDER INFORMATION
W
UU
ORDER PART
NUMBER
LT1467LCS
T
JMAX
= 150°C, θ
JA
= 150°C/ W
ORDER PART
NUMBER
LT1466LCN8
LT1466LCS8
S8 PART MARKING
1466L
TOP VIEW
S PACKAGE
16-LEAD PLASTIC SO
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
OUT A
–IN A
+IN A
V
+
+IN B
–IN B
OUT B
NC
OUT D
–IN D
+IN D
V
–
+IN C
–IN C
OUT C
NC
A D
BC
T
JMAX
= 150°C, θ
JA
= 130°C/ W (N)
T
JMAX
= 150°C, θ
JA
= 190°C/ W (S)
Consult factory for Industrial and Military grade parts.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OS
Input Offset Voltage V
CM
= V
+
110 390 µV
V
CM
= V
–
110 390 µV
∆V
OS
Input Offset Voltage Shift V
CM
= V
–
to V
+
75 345 µV
Input Offset Voltage Match V
CM
= V
–
, V
+
(Notes 3, 4) 150 550 µV
(Channel-to-Channel)
I
B
Input Bias Current V
CM
= V
+
3 14 nA
V
CM
= V
–
–14 –6 nA
∆I
B
Input Bias Current Shift V
CM
= V
–
to V
+
928nA
I
OS
Input Offset Current V
CM
= V
+
0.6 3.6 nA
V
CM
= V
–
0.4 3.6 nA
∆I
OS
Input Offset Current Shift V
CM
= V
–
to V
+
0.9 5.1 nA
Input Bias Current Match V
CM
= V
+
(Note 4) 0.6 5.1 nA
(Channel-to-Channel) V
CM
= V
–
(Note 4) 0.6 5.1 nA
e
n
Input Noise Voltage Density f = 1kHz 45 nV/√Hz
i
n
Input Noise Current Density f = 1kHz 0.05 pA/ √Hz
A
VOL
Large-Signal Voltage Gain V
S
= 5V, V
O
= 0.5V to 4.4V, R
L
= 10k 400 1500 V/mV
V
S
= 3V, V
O
= 0.5V to 2.4V, R
L
= 10k 250 1000 V/mV
TA = 25°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VO = half supply, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
1
2
3
4
8
7
6
5
TOP VIEW
OUT A
–IN A
+IN A
V–
V+
OUT B
–IN B
+IN B
N8 PACKAGE
8-LEAD PDIP S8 PACKAGE
8-LEAD PLASTIC SO
A
B
L7 LJEJNW
3
LT1466L/LT1467L
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
CMRR Common Mode Rejection Ratio V
CM
= V
–
to V
+
, V
S
= 5V 83 96 dB
CMRR Match (Channel-to-Channel) V
CM
= V
–
to V
+
, V
S
= 5V (Note 4) 80 93 dB
PSRR Power Supply Rejection Ratio V
S
= 2.3V to 12V, V
CM
= V
O
= 0.5V 90 105 dB
PSRR Match (Channel-to-Channel) V
S
= 2.3V to 12V, V
CM
= V
O
= 0.5V (Note 4) 84 105 dB
V
OL
Output Voltage Swing LOW No Load 32 60 mV
I
SINK
= 0.5mA 135 270 mV
I
SINK
= 2.5mA 235 470 mV
V
OH
Output Voltage Swing HIGH No Load V
+
– 0.052 V
+
– 0.026 V
I
SOURCE
= 0.5mA V
+
– 0.270 V
+
– 0.135 V
I
SOURCE
= 2.5mA V
+
– 0.570 V
+
– 0.265 V
I
SC
Short-Circuit Current 10 17 mA
I
S
Supply Current per Amplifier 60 75 µA
TA = 25°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VO = half supply, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
0°C ≤ TA ≤ 70°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VO = half supply, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OS
Input Offset Voltage V
CM
= V
+
●140 585 µV
V
CM
= V
–
●140 585 µV
V
OS
TC Input Offset Voltage Drift (Note 2) ●27µV/°C
∆V
OS
Input Offset Voltage Shift V
CM
= V
–
to V
+
●80 500 µV
Input Offset Voltage Match V
CM
= V
–
, V
+
(Notes 3, 4) ●170 825 µV
(Channel-to-Channel)
I
B
Input Bias Current V
CM
= V
+
● 8 16 nA
V
CM
= V
–
●–16 –8 nA
∆I
B
Input Bias Current Shift V
CM
= V
–
to V
+
●16 32 nA
I
OS
Input Offset Current V
CM
= V
+
●0.7 5.3 nA
V
CM
= V
–
●0.5 5.3 nA
∆I
OS
Input Offset Current Shift V
CM
= V
–
to V
+
●0.8 7.5 nA
Input Bias Current Match V
CM
= V
+
(Note 4) ●0.7 7.5 nA
(Channel-to-Channel) V
CM
= V
–
(Note 4) ●0.6 7.5 nA
A
VOL
Large-Signal Voltage Gain V
S
= 5V, V
O
= 0.5V to 4.4V, R
L
= 10k ●100 500 V/mV
V
S
= 3V, V
O
= 0.5V to 2.4V, R
L
= 10k ●70 400 V/mV
CMRR Common Mode Rejection Ratio V
CM
= V
–
to V
+
, V
S
= 5V ●80 96 dB
CMRR Match (Channel-to-Channel) V
CM
= V
–
to V
+
, V
S
= 5V (Note 4) ●75 93 dB
PSRR Power Supply Rejection Ratio V
S
= 2.3V to 12V, V
CM
= V
O
= 0.5V ●80 105 dB
PSRR Match (Channel-to-Channel) V
S
= 2.3V to 12V, V
CM
= V
O
= 0.5V (Note 4) ●80 105 dB
V
OL
Output Voltage Swing LOW No Load ●42 80 mV
I
SINK
= 0.5mA ●150 300 mV
I
SINK
= 2.5mA ●270 540 mV
V
OH
Output Voltage Swing HIGH No Load ●V
+
– 0.065 V
+
– 0.033 V
I
SOURCE
= 0.5mA ●V
+
– 0.305 V
+
– 0.155 V
I
SOURCE
= 2.5mA ●V
+
– 0.620 V
+
– 0.310 V
I
SC
Short-Circuit Current ●716 mA
I
S
Supply Current per Amplifier ●70 85 µA
L7LELUWW
4
LT1466L/LT1467L
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OS
Input Offset Voltage V
CM
= V
+
120 475 µV
V
CM
= V
–
120 475 µV
∆V
OS
Input Offset Voltage Shift V
CM
= V
–
to V
+
80 390 µV
Input Offset Voltage Match V
CM
= V
–
, V
+
(Notes 3, 4) 150 685 µV
(Channel-to-Channel)
I
B
Input Bias Current V
CM
= V
+
3 14 nA
V
CM
= V
–
–14 –6 nA
∆I
B
Input Bias Current Shift V
CM
= V
–
to V
+
928nA
I
OS
Input Offset Current V
CM
= V
+
0.6 3.6 nA
V
CM
= V
–
0.4 3.6 nA
∆I
OS
Input Offset Current Shift V
CM
= V
–
to V
+
0.9 5.1 nA
Input Bias Current Match V
CM
= V
+
(Note 4) 0.6 5.1 nA
(Channel-to-Channel) V
CM
= V
–
(Note 4) 0.6 5.1 nA
A
VOL
Large-Signal Voltage Gain V
O
= ±4.25V, R
L
= 10k 250 450 V/mV
Channel Separation V
O
= ±4.25V, R
L
= 10k 120 130 dB
SR Slew Rate A
V
= –1, R
L
= ∞0.018 0.04 V/µs
CMRR Common Mode Rejection Ratio V
CM
= V
–
to V
+
88 102 dB
CMRR Match (Channel-to-Channel) V
CM
= V
–
to V
+
(Note 4) 82 99 dB
V
OL
Output Voltage Swing LOW No Load V
–
+ 0.032 V
–
+ 0.060 V
I
SINK
= 0.5mA V
–
+ 0.135 V
–
+ 0.270 V
I
SINK
= 2.5mA V
–
+ 0.235 V
–
+ 0.470 V
V
OH
Output Voltage Swing HIGH No Load V
+
– 0.052 V
+
– 0.026 V
I
SOURCE
= 0.5mA V
+
– 0.270 V
+
– 0.135 V
I
SOURCE
= 2.5mA V
+
– 0.570 V
+
– 0.265 V
I
SC
Short-Circuit Current 10 18 mA
I
S
Supply Current per Amplifier 70 80 µA
GBW Gain Bandwidth Product f = 1kHz 120 kHz
TA = 25°C, VS = ±5V, VCM = VO = 0V, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OS
Input Offset Voltage V
CM
= V
+
●150 660 µV
V
CM
= V
–
●150 660 µV
∆V
OS
Input Offset Voltage Shift V
CM
= V
–
to V
+
●90 500 µV
Input Offset Voltage Match V
CM
= V
–
, V
+
(Notes 3, 4) ●180 900 µV
(Channel-to-Channel)
I
B
Input Bias Current V
CM
= V
+
● 8 16 nA
V
CM
= V
–
●–16 –8 nA
∆I
B
Input Bias Current Shift V
CM
= V
–
to V
+
●16 32 nA
I
OS
Input Offset Current V
CM
= V
+
●0.8 5.3 nA
V
CM
= V
–
●0.6 5.3 nA
∆I
OS
Input Offset Current Shift V
CM
= V
–
to V
+
●0.9 7.5 nA
Input Bias Current Match V
CM
= V
+
(Note 4) ●0.7 7.5 nA
(Channel-to-Channel) V
CM
= V
–
(Note 4) ●0.6 7.5 nA
A
VOL
Large-Signal Voltage Gain V
O
= ±4.25V, R
L
= 10k ●100 250 V/mV
Channel Separation V
O
= ±4.25V, R
L
= 10k ●120 130 dB
CMRR Common Mode Rejection Ratio V
CM
= V
–
to V
+
●86 101 dB
CMRR Match (Channel-to-Channel) V
CM
= V
–
to V
+
(Note 4) ●80 98 dB
0°C ≤ TA ≤ 70°C, VS = ±5V, VCM = VO = 0V, unless otherwise noted.
L7 LJEJNW
5
LT1466L/LT1467L
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OL
Output Voltage Swing LOW No Load ●V
–
+ 0.042 V
–
+ 0.080 V
I
SINK
= 0.5mA ●V
–
+ 0.150 V
–
+ 0.300 V
I
SINK
= 2.5mA ●V
–
+ 0.270 V
–
+ 0.540 V
V
OH
Output Voltage Swing HIGH No Load ●V
+
– 0.065 V
+
– 0.033 V
I
SOURCE
= 0.5mA ●V
+
– 0.305 V
+
– 0.155 V
I
SOURCE
= 2.5mA ●V
+
– 0.620 V
+
– 0.310 V
I
SC
Short-Circuit Current ●718 mA
I
S
Supply Current per Amplifier ●70 90 µA
0°C ≤ TA ≤ 70°C, VS = ±5V, VCM = VO = 0V, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range.
Note 1: A heat sink may be required to keep the junction temperature below
the Absolute Maximum Rating when the output is shorted indefinitely.
Note 2: This parameter is not 100% tested.
Note 3: Input offset match is the difference in offset voltage between
amplifiers measured at both V
CM
= V
–
and V
CM
= V
+
.
Note 4: Matching parameters are the difference between amplifiers A and
D and between B and C.
TYPICAL PERFORMANCE CHARACTERISTICS
UW
INPUT OFFSET VOLTAGE (µV)
–400
PERCENT OF UNITS (%)
15
20
25
–100 100 400
1466L/67L G01
10
5
0–300 –200 0200 300
V
S
= 5V, 0V
V
CM
= 0V
1900 AMPLIFIERS
VOS Distribution, VCM = 0V
INPUT OFFSET VOLTAGE SHIFT (µV)
–400
PERCENT OF UNITS (%)
15
20
25
–100 100 400
1466L/67L G03
10
5
0–300 –200 0200 300
V
S
= 5V, 0V
V
CM
= 0V TO 5V
1900 AMPLIFIERS
INPUT OFFSET VOLTAGE (µV)
–400
PERCENT OF UNITS (%)
15
20
25
–100 100 400
1466L/67L G02
10
5
0–300 –200 0200 300
V
S
= 5V, 0V
V
CM
= 5V
1900 AMPLIFIERS
VOS Distribution, VCM = 5V VOS Shift, VCM = 0V to 5V
6
LT1466L/LT1467L
TYPICAL PERFORMANCE CHARACTERISTICS
UW
COMMON MODE VOLTAGE (V)
INPUT BIAS CURRENT (nA)
0
25
234567
1466L/67L G06
–25
–50–1 01
50
T
A
= 85°C
T
A
= 85°C
T
A
= 25°C
V
S
= 5V, 0V T
A
= –40°C
T
A
= 25°C
TEMPERATURE (°C)
–40
SUPPLY CURRENT PER AMPLIFIER (µA)
70
20
1466L/67L G04
40
20
–20 0 40
10
0
80
60
50
30
60 80 100
V
S
= ±5V
V
S
= 5V, 0V
TOTAL SUPPLY VOLTAGE (V)
1
CHANGE IN OFFSET VOLTAGE (µV)
100
150
200
5
1466L/67L G05
50
0
–50 234
T
A = –40°C
TA = 25°C
TA = 85°C
Minimum Supply Voltage Input Bias Current
vs Common Mode Voltage
0.1Hz to 10Hz
Output Voltage Noise
Supply Current vs Temperature
Output Saturation Voltage
vs Load Current (Output Low)
LOAD CURRENT (mA)
0.001
10
SATURATION VOLTAGE (mV)
100
1000
0.10.01 101
1466L/67L G07
T
A
= 85°C
T
A
= –40°C
T
A
= 25°C
Output Saturation Voltage
vs Load Current (Output High)
LOAD CURRENT (mA)
0.001
10
SATURATION VOLTAGE (mV)
100
1000
0.10.01 101
1466L/67L G08
T
A
= 85°C
T
A
= –40°C
T
A
= 25°C
TIME (1s/DIV)
OUTPUT VOLTAGE (1µV/DIV)
1466L/67L G09
V
S
= ±2.5V
V
CM
= 0V
Voltage Noise Spectrum
FREQUENCY (Hz)
1
80
VOLTAGE NOISE (nV/√Hz)
100
120
140
160
10 100 1000
1466L/67L G10
60
40
20
0
180
200 VS = 5V, 0V
VCM = 2.5V
VCM = 4V
FREQUENCY (kHz)
1
10
VOLTAGE GAIN (dB)
PHASE SHIFT (DEG)
20
30
40
50
10 100 1000
1466L/67L G12
0
–10
–20
–30
60
70
20
40
60
80
100
0
–20
–40
–60
120
140
VS = ±2.5V
PHASE
GAIN
Gain and Phase Shift vs Frequency
Current Noise Spectrum
FREQUENCY (Hz)
1
0.8
CURRENT NOISE (pA/√Hz)
1.0
1.2
1.4
1.6
10 100 1000
1466L/67L G11
0.6
0.4
0.2
0
1.8
2.0 VS = 5V, 0V
VCM = 2.5V
VCM = 4V
7
LT1466L/LT1467L
TYPICAL PERFORMANCE CHARACTERISTICS
UW
Power Supply Rejection Ratio
vs Frequency
SUPPLY VOLTAGE (V)
0
FREQUENCY (kHz)
PHASE MARGIN (DEG)
80
120
20
1466L/67L G13
40
0510 15
160
GBW
60
100
20
140
40
60
20
0
80
30
50
10
70
PHASE MARGIN
Gain Bandwidth and Phase Margin
vs Supply Voltage
FREQUENCY (kHz)
1
40
POWER SUPPLY REJECTION RATIO (dB)
60
80
10 100 1000
1466L/67L G15
20
30
50
70
10
0
POSITIVE
SUPPLY
NEGATIVE
SUPPLY
V
S
= ±2.5V
Common Mode Rejection Ratio
vs Frequency
FREQUENCY (kHz)
1
40
COMMON MODE REJECTION RATIO (dB)
50
60
70
80
10 100 1000
1466L/67L G14
30
20
10
0
90
100 VS = ±2.5V
Closed-Loop Output Impedance
vs Frequency Capacitive Load Handling Voltage Gain, VS = ±5V
FREQUENCY (Hz)
10 100
0
OUTPUT IMPEDANCE (Ω)
10
10000
1000 10000 100000
1466L/67 G16
1
100
1000
AV = 10
AV = 1
VS = ±2.5V
TA = 25°C
CAPACITIVE LOAD (pF)
20
OVERSHOOT (%)
40
50
70
80
10 1000 10000 100000
1466L/67L G17
0100
60
30
10
A
V
= 1
A
V
= 5 A
V
= 10
V
S
= ±2.5V
OUTPUT VOLTAGE (V)
–5
CHANGE IN OFFSET VOLTAGE (µV)
–10
–30
–50
3
1466L/67L G18
10
30
0
–20
–40
20
40
50 –3 –1 1
–4 4
–2 025
VS = ±5V
TA = 25°C
RL = 10k
RL = 2k
Input Offset Drift vs TimeVoltage Gain, VS = 5V, 0V
OUTPUT VOLTAGE (V)
0
CHANGE IN OFFSET VOLTAGE (µV)
10
0
–10
35
1466L/67L G19
20
30
40 12 4
–20
–30
–40
6
VS = 5V, 0V
TA = 25°C
RL = 10k
RL = 2k
TIME AFTER POWER-UP (SEC)
0
CHANGE IN OFFSET VOLTAGE (µV)
20
15
10
5
0
–5
–10
–15
–20 160
1466L/67L G20
40 80 120 20014020 60 100 180
VS = ±5V
VS = ±2.5V
Output Saturation Voltage
vs Input Overdrive
INPUT OVERDRIVE (mV)
0
OUTPUT SATURATION VOLTAGE (mV)
60
80
100
80
1466L/67/ G21
40
20
50
70
90
30
10
020 40 60
10 90
30 50 70 100
OUTPUT HIGH, OUTPUT LOW
V
S
= ±2.5V
NO LOAD
A r " F: #0 11%; ’W
8
LT1466L/LT1467L
Figure 1. Simplified Schematic
TYPICAL PERFORMANCE CHARACTERISTICS
UW
Q3
D1
C
C
Q4
Q6
1466L/67L F01
Q1
Q8
Q12
Q13
I
1
V
BIAS
Q2
Q5
–IN
+IN
V
+
V
+
V
–
V
–
BUFFER AND
OUTPUT BIAS
C1
C2
OUT
Q7
Q10 Q11
Q9
APPLICATIONS INFORMATION
WUU U
Rail-to-Rail Operation
The LT1466L/LT1467L differ from conventional op amps
in the design of both the input and output stages. Figure 1
shows a simplified schematic. The input stage consists of
two differential amplifiers, a PNP stage Q1-Q2 and an NPN
stage Q3-Q4, that are active over different portions of the
input common mode range. Each input stage is trimmed
for offset voltage. A complementary output configuration
(Q12-Q13) is employed to create an output stage with rail-
to-rail swing. The devices are fabricated on Linear
Technology’s proprietary complementary bipolar process,
which ensures very similar DC and AC characteristics for
the output devices Q12 and Q13.
First, looking at the input stage, Q5 switches the current
from current source I
1
between the two input stages.
When the input common mode voltage V
CM
is near the
negative supply, Q5 is reverse biased, so the current from
I
1
becomes the tail current for the PNP differential pair
Q1-Q2. At the other extreme, when V
CM
is near the positive
supply, the PNPs Q1-Q2 are biased off. The current from
Large-Signal Response
VS = ±5V
V
S
= ±5V
A
V
= 1
1466L/67L G23
FREQUENCY (Hz)
100
CHANNEL SEPARATION (dB)
130
120
110
100
90
80
70
60
50
40
30 1k 10k 100k
V
S
= ±15V
1466L/67L G24
Channel Separation vs Frequency
1466L/67L G22
V
S
= ±2.5V
A
V
= 1
Small-Signal Response
VS = ±2.5V
9
LT1466L/LT1467L
APPLICATIONS INFORMATION
WUU U
I
1
then flows through Q5 to the current mirror D3-Q6,
furnishing the tail current for the NPN differential pair
Q3-Q4. The switchover point between stages occurs when
V
CM
is equal to the base voltage of Q5, which is biased
approximately 1.3V below the positive supply.
The collector currents of the two input pairs are combined
in the second stage, consisting of Q7-Q11. Most of the
voltage gain in the amplifier is contained in this stage. The
output of the second stage is buffered and applied to the
output devices Q12 and Q13. Capacitors C1 and C2 form
local feedback loops around the output devices, lowering
the output impedance at high frequencies. Capacitor C
C
sets the amplifier bandwidth.
Input Offset Voltage
Since the amplifier has two input stages, the input offset
voltage changes depending upon which stage is active.
When the amplifier switches between stages, the offset
voltage may go up, down or remain flat. Both stages of the
LT1466L/LT1467L are trimmed; one at the negative sup-
ply and the other at the positive supply. The resulting
common mode rejection ratio of 83dB minimum is much
better than typical rail-to-rail amplifiers.
Overdrive Protection
The LT1466L/LT1467L contain circuits that prevent the
output from reversing polarity when the input voltage
exceeds either supply. For these circuits to work properly,
the input current should be limited to –10mA when the
input is below the negative supply, and 0.5mA when the
input is above the positive supply. If the amplifier is to be
severely overdriven, an external resistor should be used to
limit the current.
Output
The output voltage swing and current sinking capability of
the LT1466L/LT1467L are affected by input overdrive as
shown in the Typical Performance Characteristics. When
monitoring voltages within 100mV of either rail, gain
should be taken to keep the output from clipping.
L7LJCUW%
10
LT1466L/LT1467L
Dimensions in inches (millimeters) unless otherwise noted.
PACKAGE DESCRIPTION
U
1234
0.150 – 0.157**
(3.810 – 3.988)
8765
0.189 – 0.197*
(4.801 – 5.004)
0.228 – 0.244
(5.791 – 6.197)
0.016 – 0.050
0.406 – 1.270
0.010 – 0.020
(0.254 – 0.508)× 45°
0°– 8° TYP
0.008 – 0.010
(0.203 – 0.254)
SO8 0996
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
TYP
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH 
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD 
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
N8 0695
0.005
(0.127)
MIN
0.100 ± 0.010
(2.540 ± 0.254)
0.065
(1.651)
TYP
0.045 – 0.065
(1.143 – 1.651)
0.130 ± 0.005
(3.302 ± 0.127)
0.015
(0.380)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
0.125
(3.175)
MIN
12 34
8765
0.255 ± 0.015*
(6.477 ± 0.381)
0.400*
(10.160)
MAX
0.009 – 0.015
(0.229 – 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.325 +0.025
–0.015
+0.635
–0.381
8.255
()
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
HHHHHHHH iHHHHHHHH A 1 ,7m 74 we Hi
11
LT1466L/LT1467L
Dimensions in inches (millimeters) unless otherwise noted.
PACKAGE DESCRIPTION
U
S Package
16-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.016 – 0.050
0.406 – 1.270
0.010 – 0.020
(0.254 – 0.508)× 45°
0° – 8° TYP
0.008 – 0.010
(0.203 – 0.254)
12345678
0.150 – 0.157**
(3.810 – 3.988)
16 15 14 13
0.386 – 0.394*
(9.804 – 10.008)
0.228 – 0.244
(5.791 – 6.197)
12 11 10 9
S16 0695
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
TYP
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH 
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD 
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
fl M L7LELUW%
12
LT1466L/LT1467L
1466l7lf LT/TP 0697 5K • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1997
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
(408) 432-1900
FAX: (408) 434-0507
●
TELEX: 499-3977
●
www.linear-tech.com
TYPICAL APPLICATIONS N
U
4-Pole,1kHz, 3.3V Single Supply State Variable Filter Using the LT1467L
10,000pF
10,000pF
C2
10,000pF
C1
10,000pF
R1*
29.5k R2*
8.6k
29.5k*
11.8k*
21.5k*
11.8k*
1µF
10k
10k
V
OUT
V
IN
3.3V
–
+
–
+
–
+
–
+
A1
1/4 LT1467L A2
1/4 LT1467L A3
1/4 LT1467L A4
1/4 LT1467L
1466L/67L TA03
*1% RESISTORS
ω
02
= 1
(R1)(C1)(R2)(C2)
1
ω
0
Q(C1)
R1 =
Q
ω
0
(C2)
R2 =
Frequency Response of 4th Order Butterworth Filter
FREQUENCY (Hz)
100
–80
GAIN (dB)
–60
–40
–20
0
1k 10k
1466L/67L TA04
GAIN
PART NUMBER DESCRIPTION COMMENTS
LTC®1152 Rail-to-Rail Input and Output, Zero-Drift Op Amp High DC Accuracy, 10µV V
OS(MAX)
, 100nV/°C Drift, 0.7MHz GBW, 0.5V/µs
Slew Rate, Maximum Supply Current 3mA
LT1366/LT1367 Dual/Quad Precision, Rail-to-Rail Input and Output 475µV V
OS(MAX)
, 400kHz GBW, 0.13V/µs Slew Rate,
Op Amps Maximum Supply Current 520µA per Op Amp
LT1498 /LT1499 Dual/Quad, 10MHz Rail-to-Rail Input and High Speed, 5V/µs Slew Rate, 475µV V
OS(MAX)
from V
+
to V
–
,
Output Op Amps Max Supply Current 2.2mA per Op Amp
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