IRFB4615PBF Datasheet by Infineon Technologies

Internatioml ISER Rectifier #4 Q A W o \ \ G D S Gare Drawn Source Symbol Parameter Single Pulse Ava‘anche Energy (2) Ava‘anche Currem (D Repelilive Avalanche Energy (D Symbol Parameter (3)
09/05/08
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HEXFET® Power MOSFET
Benefits
lImproved Gate, Avalanche and Dynamic dV/dt
Ruggedness
lFully Characterized Capacitance and Avalanche
SOA
lEnhanced body diode dV/dt and dI/dt Capability
l Lead-Free
Applications
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
S
D
G
IRFB4615PbF
GDS
Gate Drain Source
TO-220AB
IRFB4615PbF
PD -96171
VDSS 150V
RDS(on) typ. 32m
max. 39m
ID 35A
Absolute Maximum Ratings
Symbol Parameter Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V
IDM Pulsed Drain Current
PD @TC = 25°C Maximum Power Dissipation W
Linear Derating Factor W/°C
VGS Gate-to-Source Voltage V
dv/dt Peak Diode Recovery V/ns
TJ Operating Junction and
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
Avalanche Characteristics
EAS (Thermally limited) Sin
g
le Pulse Avalanche Ener
g
y mJ
IAR Avalanche Current A
EAR Repetitive Avalanche Ener
g
y mJ
Thermal Resistance
Symbol Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.045
RθCS Case-to-Sink, Flat, Greased Surface 0.50
RθJA Junction-to-Ambient (PCB Mount) ––– 62
°C/W
°C
A
109
See Fig. 14, 15, 22a, 22b,
144
38
-55 to + 175
± 20
0.96
10lb in (1.1N m)
300
Max.
35
25
140
movna'kmoi IEZR Rectfliie’ Symbol Parameter Min. Typ. Max. Units Conditions v Dram-to-Source Breakdown Voitage 15o — — v v : 0v, ID : 25011A AV /ATJ Breakdown Voltage Temp. Coelficient —— 0.19 — V/‘>C Reference to 25W). in : 5mA(D R Static Drain-to-Source Orr-Resistance —— 32 39 mg; V : 10V, ID : 21A (D v Gate Threshold Voltage 3.0 — 5.0 v vD5 : 5, ID : 100pA I Dram-to-Source Leakage Current — — 2o vD5 : 50v, v S : 0v — — 25o vD5 :15ov,v S : 0v, T :125°C | Gale-Io-Source Forward Leakage — — 100 V : 20V Gate-to-Source Reverse Leakage — — -1 00 V : -20V (a OOO””””DDD c 5. 9" (ER) 0 5. 9" (TR) Symbol Parameter 9 9 Totai Gate Charge Sync. (Q - Q ) Parameter Min. Typ. Max. Uni Conditions Conditions TJ : 25‘>C TJ : 12590 T. : 25‘>C / TJ : 12590 T. : 25‘>C vR : 100v. 99
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Notes:
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.51mH
RG = 25Ω, IAS = 21A, VGS =10V. Part not recommended for use
above this value .
ISD ≤ 21A, di/dt ≤ 549A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
S
D
G
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application
note #AN-994
Rθ is measured at TJ approximately 90°C
Static @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Unit
s
V(BR)DSS Drain-to-Source Breakdown Volta
g
e 150 ––– ––– V
∆V(BR)DSS
/
∆TJ Breakdown Volta
g
e Temp. Coefficient ––– 0.19 ––– V/°C
RDS(on) Static Drain-to-Source On-Resistance ––– 32 39 mΩ
VGS(th) Gate Threshold Volta
g
e 3.0 ––– 5.0 V
IDSS Drain-to-Source Leaka
e Current ––– ––– 20
––– ––– 250
IGSS Gate-to-Source Forward Leaka
g
e ––– ––– 100
Gate-to-Source Reverse Leaka
g
e ––– ––– -100
RG(int) Internal Gate Resistance ––– 2.7 ––– Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Unit
s
g
fs Forward Transconductance 35 ––– ––– S
QgTotal Gate Char
g
e ––– 26
Qgs Gate-to-Source Char
g
e ––– 8.6 –––
Qgd Gate-to-Drain ("Miller") Char
g
e ––– 9.0 –––
Qsync Total Gate Char
g
e Sync. (Qg - Qgd)––– 17 –––
td(on) Turn-On Delay Time ––– 15 –––
trRise Time ––– 35 –––
td(off) Turn-Off Delay Time ––– 25 –––
tfFall Time ––– 20 –––
Ciss Input Capacitance ––– 1750 –––
Coss Output Capacitance ––– 155 –––
Crss Reverse Transfer Capacitance ––– 40 –––
Coss eff. (ER) Effective Output Capacitance (Energy Related) ––– 179 –––
Coss eff. (TR) Effective Output Capacitance (Time Related) ––– 382 –––
Diode Characteristics
Symbol Parameter Min. Typ. Max. Unit
s
ISContinuous Source Current
(Body Diode)
ISM Pulsed Source Current
(Body Diode)
VSD Diode Forward Volta
g
e ––– ––– 1.3 V
trr Reverse Recovery Time ––– 70 ––– TJ = 25°C VR = 100V,
––– 83 ––– TJ = 125°C IF = 21A
Qrr Reverse Recovery Char
g
e ––– 177 ––– TJ = 25°C di
/
dt = 100A
/
µs
––– 247 ––– TJ = 125°C
IRRM Reverse Recovery Current ––– 4.9 ––– A TJ = 25°C
ton Forward Turn-On Time Intrinsic turn-on time is ne
g
li
g
ible (turn-on is dominated by LS+LD)
Conditions
VDS = 50V, ID = 21A
ID = 21A
VGS = 20V
VGS = -20V
MOSFET symbol
showing the
VDS = 75V
Conditions
VGS = 10V
VGS = 0V
VDS = 50V
ƒ = 1.0MHz (See Fig.5)
VGS = 0V, VDS = 0V to 120V (See Fig.11)
VGS = 0V, VDS = 0V to 120V
TJ = 25°C, IS = 21A, VGS = 0V
integral reverse
p-n junction diode.
Conditions
VGS = 0V, ID = 250µA
Reference to 25°C, ID = 5mA
VGS = 10V, ID = 21A
VDS = VGS, ID = 100µA
VDS = 150V, VGS = 0V
VDS = 150V, VGS = 0V, TJ = 125°C
ID = 21A
RG = 7.3Ω
VGS = 10V
VDD = 98V
ID = 21A, VDS =0V, VGS = 10V
pF
A
––– –––
––– –––
µA
nA
nC
ns
ns
nC
35
140
movna'kmo‘ IEZR Rectflhe’
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Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature
Fig 2. Typical Output Characteristics
Fig 6. Typical Gate Charge vs. Gate-to-Source VoltageFig 5. Typical Capacitance vs. Drain-to-Source Voltage
0.1 110 100
VDS, Drain-to-Source Voltage (V)
0.01
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
VGS
TOP 15V
12V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
≤60µs PULSE WIDTH
Tj = 25°C
5.0V
0.1 110 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
VGS
TOP 15V
12V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
≤60µs PULSE WIDTH
Tj = 175°C
5.0V
2 4 6 8 10 12 14 16
VGS, Gate-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
TJ = 25°C
TJ = 175°C
VDS = 50V
≤60µs PULSE WIDTH
-60 -40 -20 020 40 60 80 100120140160180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
2.5
3.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 21A
VGS = 10V
110 100 1000
VDS, Drain-to-Source Voltage (V)
10
100
1000
10000
100000
C, Capacitance (pF)
VGS = 0V, f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = C gd
Coss = Cds + Cgd
Coss
Crss
Ciss
0 5 10 15 20 25 30 35
QG, Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
VGS, Gate-to-Source Voltage (V)
VDS= 120V
VDS= 75V
VDS= 30V
ID= 21A
movna'kmo‘ IEZR Rectflhe’ PERATION \N THIS Tc : 25%: T1 : 175m
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Fig 8. Maximum Safe Operating Area
Fig 10. Drain-to-Source Breakdown Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 11. Typical COSS Stored Energy
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
VSD, Source-to-Drain Voltage (V)
1.0
10
100
1000
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 175°C
VGS = 0V
1 10 100 1000
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
Tc = 25°C
Tj = 175°C
Single Pulse
100µsec
1msec
10msec
DC
25 50 75 100 125 150 175
TC , Case Temperature (°C)
0
5
10
15
20
25
30
35
40
ID, Drain Current (A)
-60 -40 -20 020 40 60 80 100120140160180
TJ , Temperature ( °C )
140
145
150
155
160
165
170
175
180
185
190
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)
Id = 5mA
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
50
100
150
200
250
300
350
400
450
500
EAS , Single Pulse Avalanche Energy (mJ)
ID
TOP 2.8A
5.3A
BOTTOM 21A
-20 0 20 40 60 80 100 120 140 160
VDS, Drain-to-Source Voltage (V)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Energy (µJ)
movna'kmo‘ IEZR Rectflhe’ INGLE PULSE 1, Duly Factor D : «1/12 pulsewmh, «am assummg he Curr pu‘sewldm, lav,
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Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 14. Typical Avalanche Current vs.Pulsewidth
Fig 15. Maximum Avalanche Energy vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
10
Thermal Response ( Z thJC ) °C/W
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
0.1
1
10
100
Avalanche Current (A)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Τ j = 25°C and
Tstart = 150°C.
0.01
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Tj = 150°C and
Tstart =25°C (Single Pulse)
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
20
40
60
80
100
120
EAR , Avalanche Energy (mJ)
TOP Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 21A
τJ
τJ
τ1
τ1
τ2
τ2τ3
τ3
R1
R1R2
R2R3
R3
Ci i/Ri
Ci= τi/Ri
τ
τC
τ4
τ4
R4
R4Ri (°C/W) τi (sec)
0.02324 0.000008
0.26212 0.000106
0.50102 0.001115
0.25880 0.005407
A D A ID: 1 omA movna'kmo‘ IEZR Rectflhe’
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Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
Fig. 19 - Typical Stored Charge vs. dif/dtFig. 18 - Typical Recovery Current vs. dif/dt
Fig. 20 - Typical Stored Charge vs. dif/dt
-75 -50 -25 025 50 75 100 125 150 175
TJ , Temperature ( °C )
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
VGS(th), Gate threshold Voltage (V)
ID = 100µA
ID = 250uA
ID = 1.0mA
ID = 1.0A
0200 400 600 800 1000
diF /dt (A/µs)
0
5
10
15
20
25
30
IRR (A)
IF = 14A
VR = 100V
TJ = 25°C
TJ = 125°C
0200 400 600 800 1000
diF /dt (A/µs)
0
5
10
15
20
25
30
35
IRR (A)
IF = 21A
VR = 100V
TJ = 25°C
TJ = 125°C
0200 400 600 800 1000
diF /dt (A/µs)
100
200
300
400
500
600
700
800
QRR (A)
IF = 14A
VR = 100V
TJ = 25°C
TJ = 125°C
0200 400 600 800 1000
diF /dt (A/µs)
100
200
300
400
500
600
700
800
900
1000
QRR (A)
IF = 21A
VR = 100V
TJ = 25°C
TJ = 125°C
Internationoi Ion Rectifier ii :{éufii T T Ti 2°) @ vw Fig 22a. Unciamped Inducnve Test Circuii h##vvwi 1E ,, L Fig 23a. SwiIching Time Tesi Circuik Fig 24a. Gaie Charge Test Circun www.irf.com has i " Fig 22b. Unclamped Induciive Wa 1+.'4+~—>~—»' ' figs! 09:2 09:1 0956! Fig 24b. Gaie Charge Wa
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Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms
Fig 22b. Unclamped Inductive Waveforms
Fig 22a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
Inductor Current
D.U.T. VDS
ID
IG
3mA
VGS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
-
VDD
VGS
TO-220AB Part Marki EXAMPLE: THIS IS AN IRE1010 LOT CODE 1789 ASSEMBLED ON WW1Q 2000 IN THE ASSEMBLY LINE “C“ Note: “P“ in assembly line position indicates “Lead - Free“ TO-220AB packages are nm reco Note: For the most emem drawing please refer I0 [12 website a! ' m W m, ’ we; . ms u I» n) :va A ' uwwu “‘1 Mums :‘ :: » I 1‘ I} ‘ 3 *1 INTERNATIONAL RECTIFIER \\ F‘F‘C / LOGO \ (/7 ASSEMBLY f’f LOTCODE / InternationoI Ion RecIIIIer / PART NUMBER ' DATE CODE YEAR 0 : 2000 WEEK1Q LINE C International IeR Rectifier
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TO-220AB Part Marking Information
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
TO-220AB packages are not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 09/2008